ds-133 rev c saronix saronix crystal clock oscillator ncc series technical data 5v, cmos, ttl, low current 141 jefferson drive ? menlo park, ca 94025 usa 650-470-7700 800-227-8974 fax 650-462-9894 frequency range: 62.5 khz to 24 mhz ( ? size - 250 khz to 24 mhz ) frequency stability: 25, 50 or 100 ppm over all conditions: calibration tolerance, operating temperature, input voltage change, load change, aging, shock and vibration. temperature range: operating: storage: 0c to +70c -55c to +125c supply voltage: recommended operating: 5v 10% supply current: (see input current vs. frequency graph, page 2) output drive: cmos symmetry rise & fall times: logic 0: logic 1: output load: see part numbering guide 12ns max, 20% to 80% v dd 10% v dd max 90% v dd min 2 cmos ttl symmetry rise & fall times: logic 0: logic 1: output load: see part numbering guide 12ns max, 0.5v to 2.5v 0.5v max 2.5v min (v cc -0.6 typ) 2 lsttl mechanical: shock: solderability: terminal strength: vibration: solvent resistance: resistance to soldering heat: mil-std-883, method 2002, condition b mil-std-883, method 2003 mil-std-883, method 2004, condition b2 mil-std-883, method 2007, condition a mil-std-202, method 215 mil-std-202, method 210, condition a, b or c actual size description a crystal controlled, low current hybrid oscillator providing precise rise and fall times to drive cmos and nmos micro- processors. compatible with both cmos and ttl. can drive up to 2 lsttl loads. device is packaged in 14-pin or an 8-pin dip compatible full size or half size, resistance welded, all metal case. pin 7 (pin 4 for ? size) is grounded to the case to reduce rfi. 1 level 80% v dd t r t f t r t f cmos ttl v dd 2.5 vdc gnd 0.5 vdc 1.5 vdc symmetry symmetry 0 level 50% v dd 20% v dd applications & features low power cmos and ttl compatible output enable/disable feature available grounded, all metal full size and half size case output waveform environmental: gross leak test: fine leak test: thermal shock: moisture resistance: mil-std-883, method 1014, condition c mil-std-883, method 1014, condition a2 mil-std-883, method 1011, condition a mil-std-883, method 1004 part numbering guide ncc 0 6 0 c e - 4.0000 frequency (mhz) series symmetry & temperature range 0 = 40/60% max, 0 to 70c 2 = 40/60% max, -40 to 85c 4 = 45/55% max, -40 to 85c, ttl to 7.1590mhz 6 = 45/55% max, 0 to 70c, ttl to 7.1590mhz a = 45/55% max, 0 to 70c, cmos to 7.1590mhz c = 45/55% max, -40 to 85c, cmos to 7.1590mhz blank = no enable/disable e = enable/ disable frequency range 3 = 62.5 khz to 4 mhz, full size 250 khz to 4 mhz, half size 6 = 4+ mhz to 24 mhz stability tolerance a = 25 ppm, 0 to +70c only b = 50 ppm c = 100 ppm package type 0 = full size 9 = half size
all specifications are subject to change without notice. ds-133 rev c saronix ncc series saronix crystal clock oscillator technical data 5v, cmos, ttl, low current 141 jefferson drive ? menlo park, ca 94025 usa 650-470-7700 800-227-8974 fax 650-462-9894 package details 7.62.13 .300.005 pin 14 +5 vdc 120 0.91 .036 max 5.08 .200 7.62.20 .300.008 pin 4 gnd 6.0 .236 pin 5 output 1.5 .059 denotes pin 1 includes date code, frequency & model saronix max 0.91 .036 input current vs. frequency at +5.0v full size package test circuits 10.0 9.0 8.0 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0 .5 1.0 5.0 10 15 20 25 frequency (mhz) input current (ma) maximum typical 21.0 .825 max .46.08 .018.003 5.08 .200 max 15.24.13 .600.005 12.19.13 .480.005 pin 1 nc or e/d 4.57.13 .180.005 pin 7 gnd 13.0 .510 max (4) glass insulators pin 8 output denotes pin 1 saronix xtal osc includes date code, frequency & model pin 8 +5vdc 120 120 13.0 .510 max pin 1 nc or e/d 1.5 .059 6.35.51 .2500.02 7.62.50 .300.008 .46.08 .018.003 max max 10.87 .428 max half size package ma m v m pin 14 (8) pin 8 (5) out v cc oscillator gnd pin 1 (1) * pin 7 (4) 200k ? c l power supply note: c l = 15 pf max (includes probe and fixture capacitance) pin 1 = no connection or enable/disable function optional (enable = "1" level, disable = "0" level). *( ) indicates pin numbers for half-size package cmos test circuit ma m power supply v m pin 14 (8) pin 8 (5) out v cc oscillator gnd pin 1 (1) * pin 7 (4) 1n4148 or equivalent c l 2k ? note: c l = 15 pf max (includes probe and fixture capacitance) pin 1 = no connection or enable/disable function optional (enable = "1" level, disable = "0" level). *( ) indicates pin numbers for half-size package ttl test circuit marking format * marking format * scale: none ( dimensions in ) mm inches * exact location of items may vary 6.35.51 .2500.02 13.0 510
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